RISC-V Summit

RISC-V Summit

The RISC-V Summit is the leading event that brings together Europe’s key stakeholders—industry, public administrations, research centers, academia, and the innovation ecosystem—who are shaping the future of RISC-V technology. This year, Bologna will host the...
Mobile World Congress 2026

Mobile World Congress 2026

This year, the Barcelona Zettascale Lab (BZL) will be present at 4YFN during the Mobile World Congress, the leading event that brings together the entire global ecosystem of connectivity and digital innovation. As part of the BSC AI Factory booth (Hall 8.1), this...
It’s the memory, stupid!

It’s the memory, stupid!

Join BSC, Intel and INESC-ID to deep dive into memory system profiling and performance analysis. The course is organized by the BSC Memory Systems Team, founded in 2014. Since its creation, the team has been actively exploring memory systems for high-performance...
Designing HPC Architectures at BSC

Designing HPC Architectures at BSC

Miquel Moretó presented the seminar “Designing HPC Architectures at BSC” on January 14 as part of the  Future Computing Seminar Series, organized by ETH Zurich. In his talk, Miquel provided an introduction to the different high-performance computing (HPC) architecture...
HiPEAC 2026

HiPEAC 2026

The Barcelona Zettascale Lab will take part in HiPEAC 2026, Europe’s leading forum for experts in computer architecture, programming models, compilers, and operating systems for general-purpose, embedded, and cyber-physical systems. Within the conference programme, a...