Advancing RISC-V performance: insights from the BZL internal Hackathon
BZL team during the Hackathon, showcasing a running Linpack instance on 2 nodes / 4 Ox cores. Last 26 February, the Barcelona Zettascale Lab team successfully concluded its internal RISC-V Hackathon, bringing together researchers and engineers to explore the latest...
Showcasing the success of the TC1 validation at Mobile World Congress
The Barcelona Zettascale Lab participated in this year’s Mobile World Congress (MWC), held in Barcelona from 2–5 March at Fira Gran Via.Following the successful announcement of the TC1 validation, which was first presented at the HiPEAC Conference in Krakow earlier...
BSC strengthens Europe’s leadership in chip and memory innovation through joint research and training
The Barcelona Supercomputing Center-Centro Nacional de Supercomputación is reinforcing Europe’s push toward next-generation computing through a training that brought together leading research and industry actors around a shared strategic vision: advancing chip...
Barcelona Zettascale Lab advances European technological sovereignty as Cinco Ranch TC1 chip passes validation
Tests confirm the robustness of the new open-source chip architecture, positioning the BSC-led lab among Europe’s leaders in advanced computing The Barcelona Zettascale Lab (BZL), a project led by the Barcelona Supercomputing Center – Centro Nacional de...
Barcelona Zettascale Lab showcases its progress in next-generation RISC-V–based HPC chip design at HiPEAC 2026
The presence at HiPEAC 2026 combined technological demonstrations, participation in key workshops, and a strong commitment to boosting European innovation in HPC.Several members of the Barcelona Supercomputing Center at the Barcelona Zettascale Lab booth at HiPEAC...
Barcelona Zettascale Lab strengthens its presence across key semiconductor and chip design events
Over the past months, the Barcelona Zettascale Lab (BZL) has actively participated in a range of leading events across the chip design, semiconductor, and high-performance computing (HPC) ecosystem. This presence reflects BZL’s commitment to advancing RISC-V,...
Barcelona Zettascale Lab participates in the III National Congress of the Semiconductor Industry in Las Palmas de Gran Canaria
Organized by ASEMI, in collaboration with the Las Palmas de Gran Canaria city Council and the Government of the Canary Islands, the III ChipNation Congress of the Semiconductor Industry took place on December 3rd to 5th in Las Palmas de Gran Canaria. With the slogan...
BZL presented to ESRA Semiconductor Delegation as Presidency Passes from Piemonte to Catalonia
Barcelona, November 2025 — Barcelona Zettascale Lab representatives, together with other members of the Barcelona Supercomputing Center, received around 50 participants from the Government of Catalonia, through ACCIÓ and semiconductor industry leaders and political...
Strategic Meeting for CincoRanch TC2 RTL Freeze
In line with our objectives, on July 30, 2025, BZL hosted a strategic meeting at the BSC Auditorium to plan the Register-Transfer Level (RTL) design freeze for CincoRanch TC2, scheduled for September. On July 29, 2025, BZL received the first physical prototypes of the...
BZL Team Celebrates Key Milestone with Presentation of Cinco Ranch
Barcelona, July 4, 2025 – The Barcelona Zettascale Lab (BZL) team gathered this week to celebrate a significant achievement in our journey: the successful tape-out and forthcoming arrival of the Cinco Ranch processor. This presentation marked a moment of pride and...