Strategic Meeting for CincoRanch TC2 RTL Freeze
In line with our objectives, on July 30, 2025, BZL hosted a strategic meeting at the BSC Auditorium to plan the Register-Transfer Level (RTL) design freeze for CincoRanch TC2, scheduled for September. On July 29, 2025, BZL received the first physical prototypes of the...
BZL Team Celebrates Key Milestone with Presentation of Cinco Ranch
Barcelona, July 4, 2025 – The Barcelona Zettascale Lab (BZL) team gathered this week to celebrate a significant achievement in our journey: the successful tape-out and forthcoming arrival of the Cinco Ranch processor. This presentation marked a moment of pride and...
Formalizing RISC-V Prototype Validation: BZL Incorporates Intel Hawk Canyon V2 Board
Barcelona, June 2025 – At the Barcelona Zettascale Lab (BZL), we continue our efforts to advance the validation of high-tech chip prototypes. With this vision, Intel's Hawk Canyon V2 board has been integrated into our research infrastructure, a key tool for the...
Cinco Ranch: The Most Advanced Lagarto Processor Heads to Fabrication with Intel 3 Technology
Barcelona, April 2025 – The Barcelona Zettascale Lab (BZL), led by the Barcelona Supercomputing Center – Centro Nacional de Supercomputación (BSC-CNS), proudly announces the submission of Cinco Ranch, the fifth-generation processor in the Lagarto series, for...
BZL Face-to-Face Meeting 2025: Advancing Zettascale Innovation
Barcelona, March 4, 2025 – Yesterday, the Barcelona Zettascale Lab (BZL) held its highly anticipated face-to-face meeting at the Ágora Room at UPC Barcelona. This key event brought together over 150 engineers from various teams to enhance communication and coordinate...
Barcelona Zettascale Lab (BZL) at the Annual Meeting 2024 of the Barcelona Supercomputing Center (BSC)
The Barcelona Zettascale Lab (BZL) made a notable appearance at the Annual Meeting 2024 of the Barcelona Supercomputing Center (BSC). During the event, BZL showcased its advancements in the development of chips based on the RISC-V architecture, designed to drive...
RISC-V Hackathon at HiPEAC 2025: Innovating for European Technological Independence
📅 Date: Monday, January 20, 2025 📍 Location: Palau de Congressos, Barcelona ⏰ Time: 8:30 - 17:30 (Hackathon starts at 10:00) The Barcelona Zettascale Lab is pleased to announce its participation in the RISC-V Hackathon, taking place during the prestigious HiPEAC 2025...
RISC-V: principles for understanding how to freely develop new solutions
The Barcelona Supercomputing Center (BSC) has successfully completed the first edition of the Training Course on RISC-V Fundamentals, held from November 11 to 13, 2024, at the UPC Campus Nord in Barcelona. This intermediate-level course, organized as part of the...
BZL at the at the RISC-V Summit Europe 2024
The Barcelona Zettascale Lab (BZL) attended the second edition of the RISC-V Summit Europe 2024, held from June 24 to 28 in Munich, Germany. This event, one of Europe's most significant conferences on RISC-V architecture, brought together industry leaders, academics,...
The Zettascale Lab of Barcelona; the Bet on European Technological Sovereignty by the Barcelona Supercomputing Center
In an effort to strengthen European technological sovereignty and lead innovation in high-performance computing (HPC), the Barcelona Supercomputing Center (BSC) announces the launch of the Zettascale Laboratory. This ambitious project, backed by the NextGenerationEU...