Enabling Syscall Interception on RISC-V

Enabling Syscall Interception on RISC-V

Poster presentation
2025
Petar Andrić, Aaron Call, Ramon Nou
Designing High Performance Computers at the Barcelona Supercomputing Center

Designing High Performance Computers at the Barcelona Supercomputing Center

Oral presentation
2024
Rafael Gomà
RISC-V principles for understanding how to freely develop new solutions

RISC-V principles for understanding how to freely develop new solutions

Oral presentation
2024
Teresa Cervero
WISEDRAM: A Reliable Bitwise In-DRAM Accelerator

WISEDRAM: A Reliable Bitwise In-DRAM Accelerator

Publication in Conference Proceedings / Workshop
2025
Soleimani, Mohammad Arman Rohbani, Nezam Cristal Kestelman, Adrián orciddrac Unsal, Osman Sabri Sarbazi-Azad, Hamid
Synergizing OpenMP Paradigms Through Free Agents and nOS-V

Synergizing OpenMP Paradigms Through Free Agents and nOS-V

Article in journal
2025
Antoni Navarro, Raúl Peñacoba, Vincent A. Arcila, Rodrigo Arias, David Álvarez & Vicenç Beltran