BZL Showcases Advancements at the RISC-V Summit in Paris

by | May 13, 2025

The Barcelona Zettascale Lab (BZL) made a significant impact at the prestigious RISC-V Summit, the global benchmark event for the RISC-V community. BZL engineers and researchers presented the project’s latest advancements, underscoring the initiative’s commitment to innovation in high-performance chip design and the promotion of the open RISC-V ecosystem.

Live Demonstrations and Key Presentations

A major highlight at the Barcelona Supercomputing Center (BSC) booth, BZL’s coordinating entity, was the live demonstration of the Mondragon board. This board, which integrates Sargantana chips (a design predating BZL but crucial to the group’s developmental trajectory), showcased its capabilities through an FPGA demo. This interactive demonstration allowed attendees to gain firsthand insight into the potential of the developed architectures and their practical applications.

In addition to the Mondragon board demonstration, BZL representatives were actively involved in a range of activities, including technical presentations and roundtable discussions. These sessions focused on BZL’s progress in developing prototype chips based on the RISC-V architecture, with a particular emphasis on energy efficiency and sustainability—fundamental pillars of the BZL project.

BSC Booth at RISC-V Summit 2025: A Focus on Technical Dissemination

The preparation for the BZL’s participation in the RISC-V Summit 2025 centered on creating robust technical demonstrations designed to effectively showcase advancements in RISC-V architectures and associated developments. Internal documentation from project coordination meetings, specifically minutes dated May 9, 2025, highlighted the intensive work undertaken, which included:

  • Mondragon Board Demonstrations:
    • Utilizing the predecessor Sargantana chips. While not direct BZL designs, these chips are fundamental in the research lineage that informs current BZL prototypes.
    • These demos aimed to illustrate the evolution and capabilities of the underlying base technology.
  • FPGA Demo:
    • A specific demonstration leveraging FPGA technology to showcase concrete aspects of the designs currently under development within the BZL.
  • Sargantana Multicore Demonstration:
    • Supported by audiovisual material (videos) to clearly present the performance and multicore functionality of these foundational previous designs.
  • Project Posters:
    • Development of comprehensive graphic and technical material in poster format.
    • The objective was the effective dissemination of research results and BZL project advancements to the scientific community and industry leaders present at the Summit.

This meticulous planning and execution underscore BZL’s commitment to the tangible presentation of its scientific and technical progress. It also highlights its active contribution to the RISC-V ecosystem.